Frequently Asked Question

What does "Enable GDS oversampling" do?
Last Updated 3 years ago

In order to determine what is the maximal frequency of the digital signals that can be observed, let’s first define one term – the effective resolution. This resolution can be calculated by the following formula:


Since in most cases the fastest signals in a power electronics circuit are the Pulse-width modulation (PWM) gate drive signals, the effective resolution can be defined as the maximum resolution of the PWM that the HIL digital input sees for the given switching frequency. If, for example, there is a PWM signal with a resolution of 16 bits (which means 65000 different values of duty cycle), the effective resolution might be lower, depending on the PWM frequency and sampling time.

Gate Drive Signal (GDS) Oversampling, which is enabled by default in the Schematic Settings means that HIL samples its converter digital inputs with a larger frequency than the time step frequency. Nevertheless, if GDS Oversampling is not enabled, then its digital signals are sampled with the same time steps as those defined by the simulation step. This means that if, for example, if the simulation step is set to 1µS, sampling will be executed at that same moment with a sampling frequency of (1µS)-1 = 1MHz. This can be a problem since, with sampling frequency this low, there is no way of knowing in which exact moment a change has occurred, which may introduce a sampling error.


The following figure shows the effect of possible sampling errors, with the green line representing the Digital Input (DI) sampling and the blue line (X) representing the change in the model state after the simulation step (SS) calculation. This incorrect information about the exact time a change in the digital input has occurred can introduce an error during state space calculation with a latency of 1-2 simulation steps.

Enabling GDS Oversampling allows the HIL device to sample inputs multiple times in one time step while also memorizing the moment this change has happened. By doing this, we can attenuate sampling errors, and reach far better simulation results. This works because with GDS Oversampling, there is another time step specifically dedicated to compensate for the exact time that digital changes were made after state space calculations are conducted. With GDS Oversampling, we can significantly increase the effective PWM resolution, as shown in the following figure by the red arrows


Drawbacks of GDS Oversampling include an additional computational load and additional latency in the form of an additional time step dedicated for compensation. If you do not need high precision in sampling digital inputs, then you can disable GDS Oversampling. This will lower the timing constraints and enable you to reach lower simulation steps.

An additional drawback is that GDS can handle only one GDS transition within each sub-circuit.

When using the Boost example model with a switching frequency of 20kHz and a PWM modulator block utilized in loop-back, we can see the difference between cases where GDS is used and when it is not. The figure below shows output voltage and current of a fixed PWM duty cycle in steady state operation with GDS Oversampling disabled. Fluctuations in both graphs are due to uncorrected sampling errors and are not expected in the real system.


With a 1µS simulation step, the effective resolution is less than 6 bits, calculated with the formula given in the beginning. This means that simulator sees around 50 samples per PWM period, which results in imprecise duty cycle detection. Because of this, there are low frequency voltage and current fluctuations in the steady state with a fixed PWM duty cycle, which is something we do not expect to see in the real system.

However, with GDS Oversampling enabled, sampling period is much lower (20ns for HIL600/HIL602; 6.25ns for HIL402/HIL602+/HIL604 and 3.5ns for HIL404), which increases an effective resolution to around 13 or 12 bits. With this increased number of samples per PWM period, we have much more accurate results which can be seen in the figure below, where no unexpected fluctuations exist.


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