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Video: 4.3.1. GDS oversampling
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TRANSCRIPT

00:00:02

Hello! Welcome to the module about converter features. 

00:00:07

In previous lessons, we focused on the pre-built converter models and the ways  

00:00:11

they can be controlled. For the lessons in this 4.3 module, we will highlight some  

00:00:16

specific features that help us to simulate converters in real-time with high accuracy.  

00:00:21

We will cover the following topics: gate-drive signal oversampling,  

00:00:25

switching delay, dead-time violation detection, power loss calculation, and forward voltage drop. 

00:00:34

Let's start by learning about GDS oversampling.First of all, GDS stands for gate-drive signals,  

00:00:42

which are the PWM digital inputs responsible for driving the switches of the converter.  

00:00:46

You can see an example GDS waveform here.In this example, there is no oversampling,  

00:00:54

meaning that the GDS is sampled only at the simulation time steps,  

00:00:58

which are identified as k, k plus 1, and so on.To understand why GDS oversampling is an important  

00:01:06

feature, let us first define what effective resolution is. 

00:01:10

Effective resolution is the maximum PWM resolution that the HIL device sees, and can be calculated  

00:01:16

by the following formula, where f-PWM is the PWM frequency and Ts is the sampling period. 

00:01:24

For example, consider a PWM signal with a resolution of 16 bits.  

00:01:29

This means that there are more than 65 thousand possible values for the duty cycle. 

00:01:35

However, what happens if we have a simulation running with a PWM frequency of 20 kilohertz and  

00:01:41

a GDS sampling period equal to the simulation time step, let s say, 1 micro-second? 

00:01:47

Using the formula, we find that the effective resolution would be limited to less than 6 bits.  

00:01:52

As a consequence, instead of seeing the 65 thousand possible duty cycle values,  

00:01:58

the HIL device would only be able to distinguish about 50 values, introducing sampling errors that  

00:02:03

could lead to imprecise simulation results.To further illustrate that, consider the  

00:02:08

following case, where the GDS input is sampled only at the beginning of each simulation step.  

00:02:14

Once again, the simulation time steps are identified by k, k plus 1, k plus 2, and so on. 

00:02:22

In the top figure, we consider that the state of the GDS signal,  

00:02:26

labelled here as the green digital input DI, changed right before the sampling instant k.  

00:02:32

Therefore, the respective change in the state variables, shown by the blue X line,  

00:02:36

can be seen only in the next simulation time step, after the state space, or SS calculations. 

00:02:44

On the other hand, the bottom figure shows a case where the GDS signal changed right after  

00:02:48

the sampling instant k. This change can only be observed by the model at the next sampling,  

00:02:54

k plus 1, and the respective change in the state variables will be seen only at k plus 2. 

00:03:01

These two cases show that when the GDS sampling period is equal to the simulation time step,  

00:03:06

there will be a variable sampling error and a variable computational latency,  

00:03:10

in the range of 1 to 2 simulation time steps. 

00:03:14

To highlight the effects of insufficient sampling resolution in a practical application,  

00:03:18

let's consider a boost converter driven by a controller with a constant duty cycle and a  

00:03:23

switching frequency of 80 kilohertz. The converter is simulated in real-time using a Typhoon HIL402  

00:03:29

device with a 500 nanoseconds simulation time step. The GDS oversampling feature is disabled,  

00:03:36

meaning that the GDS sampling period and time step are both equal. 

00:03:41

Applying the formula shown earlier, we see that for this case we have an effective resolution  

00:03:46

of less than 5 bits. This low-resolution leads to errors in GDS sampling, which  

00:03:52

translates to imprecise duty cycle detection. The result is the undesired low frequency fluctuation  

00:03:58

of converter states that we see in this figure.In offline simulations, these outcomes could be  

00:04:04

mitigated by using variable step solvers or reducing the simulation time step at  

00:04:09

the expense of longer execution times. However, these are not viable for real-time simulators,  

00:04:15

so we need an alternative method to enhance the sampled GDS time resolution. 

00:04:21

In order to reduce GDS sampling error and to meet high accuracy requirements with limited  

00:04:26

simulation step sizes, time resolution can be improved by using different strategies. 

00:04:32

Let s now talk about the first one: Global GDS Oversampling. 

00:04:37

In this approach, the idea is to sample the PWM signals multiple times within one simulation step,  

00:04:43

which can significantly reduce sampling errors. Also, the gate input transitions are time stamped,  

00:04:50

meaning that the time of the GDS transition is precisely captured, and then used to  

00:04:54

compensate the state variables of the model.So, let s take as an example the following figure,  

00:05:00

where there is a change in the digital input between simulation steps k and k+1.  

00:05:05

We can summarize the Global GDS Oversampling method by the following three steps. 

00:05:11

First, the GDS is sampled multiple times within a simulation step. The instant when the change  

00:05:17

in the digital input occurs, it is identified and timestamped. Then, in the next simulation step,  

00:05:23

from k+1 to k+2, the state space calculations are performed without acknowledging that the GDS  

00:05:29

input has changed. Finally, from k+2 to k+3, the state variables are compensated based on  

00:05:36

the timestamped value, and at k+3 the model is updated with the accurate state values. 

00:05:43

To illustrate the improvements on simulation accuracy obtained with the Global GDS  

00:05:48

Oversampling method, let s consider again the same boost converter example shown previously,  

00:05:53

with a constant duty cycle and a switching frequency of 80 kilohertz. 

00:05:57

Once again, the converter is simulated in real-time using the Typhoon HIL402 device,  

00:06:03

with simulation time step equal to 500 nanoseconds. However, the Global GDS  

00:06:08

Oversampling feature is now enabled, and the GDS sampling period is much lower,  

00:06:14

equal to 6.25 nanoseconds, leading to an effective PWM resolution of about 10 bits. 

00:06:21

From the results, now we can clearly see that, with the improved GDS sampling resolution,  

00:06:26

the low frequency fluctuations are mitigated, leading to the expected behavior. 

00:06:32

As shown in the previous slides, the Global GDS Oversampling method can  

00:06:36

significantly improve effective PWM resolution and therefore extend the  

00:06:40

range of switching frequencies that can be simulated in real-time with high accuracy. 

00:06:45

Nevertheless, this method does require additional computational load and add an additional latency  

00:06:51

of one simulation time step, which is dedicated for the compensation of state variables. 

00:06:57

Moreover, only one GDS transition can be handled per simulation step within the same core,  

00:07:02

meaning that only the first observed GDS transition will be compensated. 

00:07:07

In cases where more than one GDS transition is likely to happen within a simulation time step,  

00:07:12

a higher accuracy can be obtained by employing the next oversampling method. 

00:07:18

Let s now talk about the second method: Switch-level GDS Oversampling. 

00:07:23

Switch-level GDS Oversampling is implemented at the component level as opposed to the core level.  

00:07:29

This means that, instead of relying on the compensation of all the state variables after  

00:07:33

the GDS transition is identified, it restructures the switch model, and the oversampling is  

00:07:39

applied to every switch separately.For that, the switching transitions of  

00:07:43

every externally commuted switch are modeled by means of controlled voltage and current sources,  

00:07:48

whose values are defined considering the average values of the GDS over the simulation time step. 

00:07:54

These average values are calculated based on the oversampling of the digital inputs,  

00:07:59

as shown in this figure and in the equation. Therefore, if the GDS resolution is high enough,  

00:08:06

it is possible to compensate all GDS transitions within that simulation step.  

00:08:11

Moreover, since the simulation step period is small in comparison to the switching period,  

00:08:16

the switching ripple will be preserved.It is important to notice that, although a  

00:08:21

large variety of models work well with Global GDS Oversampling, the Switch-level GDS Oversampling  

00:08:28

method is indicated for those applications that rely on high switching frequencies  

00:08:33

and where more than one GDS transition often happen during one simulation step, such as the  

00:08:38

dual active bridge and resonant converters.Nevertheless, it also includes a delay of one  

00:08:43

simulation step between GDS inputs and the state outputs. Moreover, since the  

00:08:49

switch model must be restructured including controlled sources and diodes, this method  

00:08:54

is more complex and computationally expensive than the Global GDS Oversampling approach. 

00:09:00

As an example of real-time simulation employing the switch-level GDS Oversampling method,  

00:09:06

let us consider a dual active bridge converter operating in open-loop,  

00:09:09

using a two-level modulation with phase shift and fixed duty cycle. 

00:09:14

The modulation is implemented in an external DSP with a switching frequency set to 250 kilohertz.  

00:09:20

The real-time simulation is performed using Typhoon HIL404 device,  

00:09:25

with a simulation time step of 250 nano seconds and GDS oversampling period of 3.5 nano seconds. 

00:09:34

First, let s consider operation with a phase shift of 50 degrees.  

00:09:38

The figure on the left shows the current through the series inductor on the top,  

00:09:42

while in the bottom we can see the voltages at the primary and secondary of the transformer. 

00:09:47

It s clear that these switching voltages are not pure square waveforms, but instead  

00:09:52

they actually include the effect of the average GDS calculated within the simulation time step.  

00:09:58

Therefore, by employing the Switch-level GDS Oversampling method, it is possible  

00:10:03

to achieve real-time simulation results with high precision for demanding high  

00:10:07

switching frequency applications, such as a dual active bridge, or DAB converter. 

00:10:14

To better illustrate the overall accuracy of the simulation in different operation points,  

00:10:18

the figure on the right shows the average output power as a function of the phase shift angle.  

00:10:23

As a reference, the theoretical output power is also plotted,  

00:10:27

confirming that a simulation using Switch-level GDS oversampling can  

00:10:32

follow the theoretical curve with good precision for the entire range. 

00:10:37

To see Switch-level GDS Oversampling in action, please check the 200 kHz  

00:10:42

DAB tutorial available on our website. The link is available in the Materials tab. 

00:10:48

Now, to conclude this lesson, let s see how the different oversampling methods can be configured  

00:10:54

in your Typhoon HIL simulation. For that, let s create a new model in Schematic Editor. 

00:11:01

First of all, it is important to recall that the oversampling resolution depends on the  

00:11:05

device that you are using. For instance, HIL404 and HIL606 devices have a GDS sampling period  

00:11:12

of 3.5 nano seconds. You can find out more information about that in the documentation  

00:11:18

link available in the Materials tab.Let s choose HIL404 with configuration  

00:11:23

1 for this demonstration.Global GDS Oversampling is supported  

00:11:28

by all Typhoon HIL devices, and it is enabled by default when you create a new schematic. 

00:11:33

If you want to disable oversampling, you can do so by unchecking the appropriate box in the circuit  

00:11:38

solver settings tab of the model settings.Nevertheless, keep in mind that GDS  

00:11:44

oversampling is highly recommended for switching frequencies exceeding 4kHz.  

00:11:50

So, what about Switch-level GDS Oversampling?Well, as explained before, you should use this  

00:11:57

method in cases where more than one GDS transition often happens during one simulation step. 

00:12:02

Since Switch-level GDS oversampling is implemented at the component level, let s add the IGBT leg  

00:12:09

component which currently supports it. So, let's drag and drop this component to our schematic. 

00:12:17

You can enable Switch-level GDS oversampling by changing the oversampling settings in the  

00:12:22

Advanced tab of the IGBT leg properties. However, notice that this option is not available here. 

00:12:29

The reason is that switch-level GDS oversampling is dependent on the device configuration, which  

00:12:35

must be properly selected in the model settings. Looking at the device configuration table  

00:12:40

for HIL404, we can see that this oversampling method is available when using configuration 3. 

00:12:47

So, let s select this configuration.Now you can see that the advanced tab of the  

00:12:55

IGBT Leg properties window has a combo box where you can choose between Global GDS oversampling  

00:13:01

and switch-level GDS oversampling.Finally, it is important to note  

00:13:06

that if Switch-level GDS oversampling is enabled in a component that supports it,  

00:13:11

Global GDS oversampling will be ignored for all components in the same sub-circuit. 

00:13:17

In this lesson, we covered the GDS oversampling methods available in our toolchain,  

00:13:22

which are important features to improve PWM effective time resolution, enabling  

00:13:27

high fidelity real-time simulation results for high switching frequency applications. 

00:13:32

For more information regarding this lecture, don't forget to check the additional documentation links  

00:13:38

available in the Materials tab.

00:13:43

Thank you for your attention.

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